CMOS devices with very thin gate dielectrics made from silicon dioxide may experience unacceptable gate leakage currents. Forming the gate dielectric from certain high-k dielectric materials, instead of silicon dioxide, can reduce gate leakage. Because, however, such a dielectric may not be compatible with polysilicon, it may be desirable to replace polysilicon based gate electrodes with metal gate electrodes in devices that include high-k gate dielectrics.
To form metal NMOS and PMOS gate electrodes that have appropriate workfunctions, it may be necessary to form them from different materials—one that ensures an acceptable workfunction for the NMOS gate electrode, and another that ensures an acceptable workfunction for the PMOS gate electrode. A replacement gate process may be used to form metal NMOS and PMOS gate electrodes from different metals. In that process, a first polysilicon layer, bracketed by a pair of spacers, is removed selectively to a second polysilicon layer to create a trench between the spacers. The trench is filled with a first metal. The second polysilicon layer is then removed, and replaced with a second metal that differs from the first metal.
When using such a replacement gate process to form metal NMOS and PMOS gate electrodes, it may be necessary to form a hard mask on the polysilicon layers to minimize silicide formation, when the transistors' source and drain regions are covered with a silicide. Although such a hard mask may protect the upper surface of the polysilicon layers, the upper corners of those layers may be exposed, when the spacers are formed. Suicide may form at those exposed corners, when the source and drain regions are silicided, which may adversely impact the subsequent polysilicon removal steps.
Accordingly, there is a need for an improved method for making a semiconductor device that includes metal gate electrodes. There is a need for a replacement gate process that replaces polysilicon layers with metal layers, which is not adversely affected by silicide formation on the polysilicon layers. The present invention provides such a method.
Features shown in these figures are not intended to be drawn to scale.